Using TI XDS110#

Use TI’s XDS110 to program and debug AM13E23019 on BeagleConnect Torque through Serial Wire Debug (SWD). This guide uses the standalone TMDSEMU110-U probe, its CTI-20 cable and its Cortex-M 10-pin adapter. An XDS110 built into a LaunchPad can have different connectors and power routing; follow that board’s external-target instructions instead of applying these probe pin numbers.

Prepare the tools#

Install Code Composer Studio (CCS) with AM13E23019 device support, including its flash programming support, and XDS110 drivers. Probe support alone does not provide the device’s flash algorithm. If AM13E23019 is absent from the device selector, obtain the matching device-support package from TI before proceeding; do not substitute an MSPM0 or generic Cortex-M33 flash configuration.
On Linux, complete the CCS installer’s debug-probe driver/USB-permission setup before running CCS as your regular user. Reconnect USB after installing the rules.
Have an application built for AM13E23019, with its startup code and linker layout. Use an executable whose load ranges have been checked, or a raw binary with its explicit destination address. For the supplied firmware, read the artifact-specific instructions first: its application ELF includes a load segment at address zero, and normal startup requires custom-loader metadata. See programming an application.
Use a breakout or custom cable to reach J2 and a digital-rail reference point. J2 is a custom eight-pin row, not a Cortex 10-pin socket. Use the board views to identify pin 1, and check continuity with power off. Keep SWD wiring short.

If BeagleConnect Torque is installed on a motor carrier, disconnect motor power and keep outputs disabled during programming. Halting the core does not establish a safe state for the carrier’s outputs.

Wire the debug connection#

Connect the probe’s CTI-20 cable to its Cortex-M 10-pin adapter, then wire the adapter’s target side using the table. The CTI-20 column is an alternative for a breakout on the native cable; it is not the same pin numbering as Cortex 10-pin.

Signal	Cortex-M 10-pin adapter	Native CTI-20	BeagleConnect Torque
SWDIO / TMS	2	1	J2.2, PA13 / SWDIO
SWCLK / TCK	4	11	J2.3, PA14 / SWCLK
System reset, active low	10	15	J2.7, `nRST`
Ground	3, 5, 9	8, 10, 12, 16	J2.5, `GND`
Target voltage reference, VTREF	1	5	J6.11 or J4.2, `+3.3V`

Tie the adapter’s ground/detect pins to common ground. Leave unused debug signals disconnected. nTRST is not system reset; use nRESET as shown. J2 does not provide a dedicated SWO trace connection.

VTREF senses the powered MCU rail; it does not power the module. J2.1 (3.3VIN_DEBUG) feeds an input of the onboard power mux, so it is not a reliable reference for carrier-powered operation. Take VTREF from the mux output, +3.3V, at J6.11 or J4.2 in either power arrangement below. See power paths and the connector reference.

Choose one power arrangement#

Make connections with supplies off. Do not connect a probe power output in parallel with another supply on the same input.

Arrangement	Power wiring	XDS110 power setting in CCS
External supply	Regulated carrier power at `+VDC`, or a separate regulated 3.3 V supply at J2.1; common ground at J2.5. Leave probe supply output disconnected.	Target supplied power
Probe powers digital circuitry	XDS110 AUX breakout TGTSUPPLYOUT, pin 2, to J2.1; AUX breakout GND, pin 4, 5 or 10, to J2.5.	Probe supplied power, 3.3 V

The AUX pin numbers above refer to the supplied 12-pin inline breakout, not the raw 14-pin AUX connector. In both arrangements, retain the SWD and VTREF wiring above. Probe power is enabled when a debug session starts and removed when it ends. Debug power alone does not supply VAA for ADC acquisition or the CAN transceiver’s 5 V rail.

Configure and connect in CCS#

Connect XDS110 to the host by USB. Apply external module power if using that arrangement.
Create a target configuration (.ccxml) for Texas Instruments XDS110 USB Debug Probe and AM13E23019. Save it with a descriptive name such as beagleconnect-torque-xds110.ccxml.
In the probe’s advanced connection properties, select SWD as the debug protocol. J2 exposes SWDIO and SWCLK, not a full JTAG interface. Set power selection according to the table. Start with a low fixed debug clock, for example 1 MHz, if adjustable. Property labels vary with CCS and device-support versions.
Leave J2.8 (BSL_INVOKE, PA6) released low for normal application startup. It has an onboard pull-down. Driving it high during reset selects ROM BSL; it is not required for SWD programming.
Launch a project-less debug session from the saved target configuration, then use Connect Target on the Cortex-M33 core. Before loading code, confirm that the core can halt and that registers and memory are readable. This separates connection problems from flash-loading problems.

Program, verify and run#

Review the image’s load ranges and the device flash settings. Keep writes and erases within the intended application area; preserve boot configuration and security data. Avoid a whole-device erase as an initial troubleshooting step.
For an executable with verified load ranges, use Load Program. For the supplied firmware, follow the artifact-specific instructions above instead. Loading symbols alone does not program memory. Enable the loader’s verification option or run Verify Program, and require a successful result before running.
Set a breakpoint at your reset handler or application entry point, reset as appropriate for the application, then resume. Check the first observable action described in getting started.
End the session and test normal startup with PA6 low. With probe-supplied power, ending the session removes digital power; start another session or switch to an external supply with power off before testing standalone operation.

For an already-programmed application, connect and Load Symbols from its matching executable to inspect it without downloading a new image. Check launch settings for automatic program loading or reset before attaching to a running system.

If it does not connect#

Symptom	Check
Host cannot find XDS110	USB data cable, probe drivers, Linux USB permissions and whether another debugger owns the probe. Follow CCS if it requests a probe firmware update.
Target voltage absent	Measure `+3.3V` and VTREF relative to J2.5. Check the chosen supply and mux path; J2.1 is an input.
Probe found, core will not connect	SWD protocol selection, adapter pin numbering, SWDIO/SWCLK continuity, reset level and common ground. Lower the debug clock.
Application prevents attachment	Try the device-supported connect-under-reset procedure, or reset and attach promptly as described in boot and recovery. Check debug/security configuration before considering an erase.
Core access works, flash load fails	Exact AM13E23019 device support, flash loader, image addresses and protection state. A successful USB connection does not validate flash support.
Program verifies but startup fails	PA6 low at reset, vector/linker layout, clock initialization and reset cause. See debugging and peripheral checks.

References and validation scope#

The board connections and power paths follow this repository’s connector and power references. Probe wiring follows TI’s XDS110 User’s Guide (SPRUI94), Tables 4 and 5 and Section 3.1, and debug connector reference. Software steps follow the CCS debug guide; obtain device support through TI’s AM13E23019 page.

These instructions have been checked against the repository and TI references, but have not yet been exercised on physical hardware. Record the module revision, probe model, CCS/device-support versions, power arrangement and programming/verification result when validating a setup.